The invention relates to an integrated digital circuit and to a method for operating an integrated digital circuit.
Digital circuits are becoming increasingly more integrated and work at increasingly higher operating frequencies. This trend is in fact leading to increasingly powerful digital circuits on ever smaller surface areas and thus to new applications.
On the other hand, larger scale integration and higher operating frequencies create problems. With digital logic circuits with structure sizes of less than 0.25 μm, the crosstalk between neighboring interconnects on the chip of the integral circuit arrangement presents a considerable level of interference for signal traffic within the logic circuit. The crosstalk is caused by the capacitive coupling of neighboring interconnects. In particular, when the logic circuit is clocked at an operating frequency of 1 GHz or above, erroneous signals can occur on the signal lines of the chip or delay times can be unduly increased, due to the capacitive coupling of interference signals.
According to Kahng, A. B., et al, “Interconnect Tuning Strategies for High Performance IC's,” Proc. Design, Automation and Testing in Europe, Paris, February 1998, so-called repeater modules are introduced into the signal path to eliminate erroneous useful signals in an integrated digital logic circuit. These repeater modules are arranged in the signal path after relatively short signal sections and refresh the disturbed signal. Alternatively or in addition, according to Kahng et al., shielding lines can be arranged between signal-carrying lines. Both solutions are characterized by an increased space requirement and cause a significant increase in the chip area, particularly when repeater modules or shielding lines are incorporated systematically over the whole surface.
Erroneous signals on a chip can, however, also be detected by suitable coding and corrected if necessary. With known classical error detecting codes, errors in the digital signal are detected by transmitting and evaluating additional parity check bits, for example, see T. Grams, Codierungsverfahren [Coding Methods], B l Hochschultaschenbücher, 625, 1986, pp. 64 ff.
A high level of redundancy is required on account of the specific combination of bit sequences, with which interference due to crosstalk occurs. Also, it is not possible to obtain erroneous signals in the correct form by repeating the transmission process, as crosstalk is not a statistically determinable process. If the same signal is re-transmitted, the errors can recur in the same manner.